1. Field of Invention
The present invention relates to a graphics display circuit architecture, and more particularly, to a graphics display circuit architecture in the computer motherboard and a control chip set therein.
2. Description of Related Art
Besides pursuing improvement in computing capability, high speed graphics function is also a major target for computer system developers. 3D-graphics technique, which requires a great amount of data transmission and prompt interaction, has become broadly adopted, yet entire system performance is degraded thereby. In order to cope with congestion problem incurred at input/output of the system in prior art, a so-called Accelerated Graphics Port (or AGP) interface specification is introduced to directly link graphics chip and control chip set on a motherboard in the industry. The present AGP comprises a variety of operating modes including 1× mode, 2× mode, 4× mode, and 8× mode for transferring data between the graphics chip and the control chip set therein.
In addition, for the control chip set applying to a current computer motherboard, a variety of bus interface specifications is introduced for the north bridge chip and the south bridge chip connecting bus. Wherein conventional Peripheral Component Interconnection (or PCI) bus, Hyper Transport (or HT) bus, VLINK bus (VLINK bus is developed by VIA Technologies, Inc.), and Peripheral Component Interconnection Express (or PCIE) bus are included. Owing to excellent performance, PCIE bus is commonly used in the graphics display circuit architecture on a computer motherboard.
In current graphics display circuit architecture, a plurality of interface specifications are developed for different purposes. For example, conventional analog signal interface for Cathode Ray Tube (CRT) screen; FD interface for Liquid Crystal Display (LCD) screen in a notebook computer; TV input/output interface for image capture; TMDS interface for long distance transmission; Low Voltage Differential Signaling (or LVDS) interface; or Digital Visual Interface (or DVI). Notice that all the foregoing interfaces above are commonly referred as Graphics (or Gfx) interface.
FIG. 1A is a schematic view of a conventional graphics display architecture on a Personal Computer (PC) motherboard. Referring to FIG. 1A, the control chip set 110 is electrically coupled to an 8× mode AGP 8× slot 115, and a graphics adapter (not shown) is plugged in the AGP 8× slot 115. The control chip set 110 controls the graphics adapter to display via the AGP 8× slot with data and control signals complying with AGP 8×-interface specification. FIG. 1B is a schematic view of another conventional graphics display architecture on a PC motherboard. Referring to FIG. 1B, the control chip set 120 is electrically coupled to a PCIE slot 125, and a graphics adapter (not shown) is plugged in the PCIE slot 125. FIG. 1C is a schematic view of yet another conventional graphics display architecture on a PC motherboard. Referring to FIG. 1C, the control chip set 130 is electrically coupled to a graphics interface 135 with the Gfx interface. Optionally, the control chip set 130 can be coupled to an expansion slot 145, whereas a graphics adapter (not shown) with Gfx interface graphics chip is plugged in the expansion slot 145.
As to the conventional graphics display architecture illustrated in FIG. 1A, 1B, and 1C, each interface has a corresponding control chip set and a corresponding slot with different specification, which causes a great inconvenience in circuit design, version control, and inventory control. Despite that it is feasible to optionally generate a display signal via the control chipset or via an external display adapter complying with AGP slot, it does not fulfill PCIE interface requirement quite yet. Thus, an integrated all-in-one interface specification that complies with PCIE, AGP, and Gfx is in great demand, whereas circuit layout and circuit design require to be simplified in order to avoid complication of motherboard design and manufacture processes.